Virtual Motor bench for high bandwidth ECU testing using JMAG-RT modeling approach on a FPGA chip

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Sebastien Cense, Opal-RT

Abstract

As motor controller’s algorithms become more complex, so do tests and development of new control strategies. This presentation will highlight the latest developments of OPAL-RT solutions to work efficiently with these new challenges and to improve time to market of electric motor drive systems. JMAG-RT v10.5 spatial harmonics PMSM model was chosen as the company’s new standard for accurate FPGA-based simulation of PMSM motors. Learn how to use the results of the finite element analysis of your motor to build your own FPGA-based HIL model in a few quick and easy steps. As the development of FPGA-based systems is more for advanced users, OPAL-RT development is oriented towards non-flashing technology using a generic and optimised approach to solve power electronics circuit. OPAL-RT turnkey system for ECU testing and rapid motor prototyping is in line with this philosophy as the user interfaces allow easy modification of motor or drive topology without requiring knowledge in FPGA or reprogramming the board.

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