JMAG solution: Higher fidelity motor HILS of FPGA-based by model-based development

to download the data

Download PDF

Koji Fukusumi, dSPACE Japan K.K.


As a solution for verification of a motor controller with higher accuracy, Hardware In the Loop (HIL) simulation based on a spatial harmonics model which is implemented on FPGA and the motor parameters extracted from JMAG-RT is very effective. This seminar gives information about comparison of dq model and spatial harmonics model on HILS, and some solutions to the issue of increase of the motor parameters due to the tests with higher accuracy. Additionally, the latest solutions such as inter-FPGA communication, a DCDC converter model and improvement of usability as tools are presented.

Search Filter

  • All Categories

Proceedings Archives